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PIC18F96J60

PIC18F96J65 PIC18F96J94 PIC18F96J99 PIC18F97J60 PIC18F97J94

PIC18F96J60

ICSP connection

Support summary

  • Programming - Yes
  • Debugging provisions - Yes

ICSP Connection

This PIC device is equipped with extremely low endurance flash. The datasheet specification guarantees only 100 erase/write cycles. It is easy to wear the flash out during development.

All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.

Refer to the datasheet for alternative connections of ENVREG pin.

Debugging

NSDSP firmware contains all the necessary provisions for debugging PIC18F96J60 and may be debugged when debugging software becomes available.

PIC18F96J60 uses ordered halting, has 3 hardware breakpoints.

Debugging does not consume resources in the user space.

This device can only be debugged when it runs at 2MHz or faster. This can only be accomplished with external clock source.

Links

Microchip PIC18F96J60 page

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