PIC18F55Q24
PIC18F55Q43 PIC18F55Q71 PIC18F56K42 PIC18F56Q24 PIC18F56Q43 PIC18F56Q71 PIC18F56Q83 PIC18F56Q84 PIC18F57K42 PIC18F57Q43 PIC18F57Q83 PIC18F57Q84 PIC18F6310 PIC18F6390 PIC18F6393 PIC18F63J11 PIC18F63J90 PIC18F6410 PIC18F6490 PIC18F6493 PIC18F64J11 PIC18F64J90 PIC18F6520 PIC18F6525 PIC18F6527 PIC18F6585 PIC18F65J10 PIC18F65J11 PIC18F65J15 PIC18F65J50 PIC18F65J90 PIC18F65J94 PIC18F65K22 PIC18F65K40 PIC18F65K80 PIC18F65K90 PIC18F6620 PIC18F6621 PIC18F6622 PIC18F6627 PIC18F6628 PIC18F6680 PIC18F66J10 PIC18F66J11 PIC18F66J15 PIC18F66J16 PIC18F66J50 PIC18F66J55 PIC18F66J60 PIC18F66J65 PIC18F66J90 PIC18F66J93 PIC18F66J94 PIC18F66J99 PIC18F66K22 PIC18F66K40 PIC18F66K80 PIC18F66K90 PIC18F6720 PIC18F6722 PIC18F6723 PIC18F67J10 PIC18F67J11 PIC18F67J50 PIC18F67J60 PIC18F67J90 PIC18F67J93 PIC18F67J94 PIC18F67K22 PIC18F67K40 PIC18F67K90 PIC18F8310 PIC18F8390 PIC18F8393 PIC18F83J11 PIC18F83J90 PIC18F8410 PIC18F8490 PIC18F8493 PIC18F84J11 PIC18F84J90 PIC18F8520 PIC18F8525 PIC18F8527 PIC18F8585 PIC18F85J10 PIC18F85J11 PIC18F85J15 PIC18F85J50 PIC18F85J90 PIC18F85J94 PIC18F85K22 PIC18F85K90 PIC18F8620 PIC18F8621 PIC18F8622 PIC18F8627 PIC18F8628 PIC18F8680 PIC18F86J10 PIC18F86J11 PIC18F86J15 PIC18F86J16 PIC18F86J50 PIC18F86J55 PIC18F86J60 PIC18F86J65 PIC18F86J72 PIC18F86J90 PIC18F86J93 PIC18F86J94 PIC18F86J99 PIC18F86K22 PIC18F86K90 PIC18F8720 PIC18F8722 PIC18F8723 PIC18F87J10 PIC18F87J11 PIC18F87J50 PIC18F87J60 PIC18F87J72 PIC18F87J90 PIC18F87J93 PIC18F87J94 PIC18F87K22 PIC18F87K90 PIC18F95J94 PIC18F96J60 PIC18F96J65 PIC18F96J94 PIC18F96J99 PIC18F97J60 PIC18F97J94PIC18F55Q24
Support summary
- Programming - Yes
- Debugging provisions - Yes
ICSP Connection
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
Programming is impossible at voltages below 2.0V.
Do not attempt to program PIC18F55Q24 at voltages below 2.0V. However not confirmed, there is a possibility that these chips may accidentally turn on ICSP inhibition when programmed at such low voltages.
ICSP access inhibition
It is possible to configure PIC18F55Q24 to inhibit all future ICSP accesses. Once this is done, the PIC can never be read, re-programmed, or otherwise accessed with NSDSP.
To inhibit all future ICSP accesses, use the following command:
nsprog inhibit-ICSP-write-irreversibly -d PIC18F55Q24
This action is irreversible. Once you inhibit the ICSP accesses, PIC18F55Q24 cannot be accessed.
Locking SAF area
SAF is a protected area in flash memory that can never be erased or written. You can use SAFLOCK configuration bit to create SAF. Once this is done, the SAF can never be re-programmed again. It is possible to read it with nsread if it is not read-protected.
Locking SAF requires a special procedure. Therefore you cannot lock SAF by setting SAFLOCK in the HEX file - NSDSP will ignore it. To lock the SAF, use the following command:
nsprog lock-SAF-permanently -d PIC18F55Q24
This action is irreversible. Once locked, the SAF area cannot be unlocked or re-programmed.
The size of the SAF area is determined by the SAFSZ configuration word.
Once SAFLOCK bit is activated, the SAFSZ can still be re-configured, but only to increase the size of the SAF area. If SAFSZ is specified in the HEX file, NSDSP will attempt to program it, however, since SAFSZ may have been locked, NSDSP will not verify the result.
Debugging
NSDSP firmware contains all the necessary provisions for debugging PIC18F55Q24 and may be debugged when debugging software becomes available.
PIC18F55Q24 uses ordered halting, has 3 hardware breakpoints.
Debugging does not consume resources in the user space.
Links
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