PIC18F6723
PIC18F67J10 PIC18F67J11 PIC18F67J50 PIC18F67J60 PIC18F67J90 PIC18F67J93 PIC18F67J94 PIC18F67K22 PIC18F67K40 PIC18F67K90 PIC18F8310 PIC18F8390 PIC18F8393 PIC18F83J11 PIC18F83J90 PIC18F8410 PIC18F8490 PIC18F8493 PIC18F84J11 PIC18F84J90 PIC18F8520 PIC18F8525 PIC18F8527 PIC18F8585 PIC18F85J10 PIC18F85J11 PIC18F85J15 PIC18F85J50 PIC18F85J90 PIC18F85J94 PIC18F85K22 PIC18F85K90 PIC18F8620 PIC18F8621 PIC18F8622 PIC18F8627 PIC18F8628 PIC18F8680 PIC18F86J10 PIC18F86J11 PIC18F86J15 PIC18F86J16 PIC18F86J50 PIC18F86J55 PIC18F86J60 PIC18F86J65 PIC18F86J72 PIC18F86J90 PIC18F86J93 PIC18F86J94 PIC18F86J99 PIC18F86K22 PIC18F86K90 PIC18F8720 PIC18F8722 PIC18F8723 PIC18F87J10 PIC18F87J11 PIC18F87J50 PIC18F87J60 PIC18F87J72 PIC18F87J90 PIC18F87J93 PIC18F87J94 PIC18F87K22 PIC18F87K90 PIC18F95J94 PIC18F96J60 PIC18F96J65 PIC18F96J94 PIC18F96J99 PIC18F97J60 PIC18F97J94PIC18F6723
Support summary
ICSP Connection
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
LVP Programming
Low-Voltage Programming (LVP) can only be used for these PIC devices if the LVP configuration bit is enabled. Fresh (unprogrammed) devices have LVP bit set and therefore they can be programmed. It is impossible to disable LVP bit during LVP programming, but if the device has been previously programmed with HVP programmer, the LVP bit may have been disabled.
When brown-out is enabled with BOREN configuration bit, LVP is only possible when the VDD voltage is above the brown-out threshold.
These limitations may be avoided with High-Voltage Programming (HVP). NSDSP-2 can generate high voltage for HVP internally. NSDSP-1 cannot, therefore NSDSP-1 requires NSHVX or an external circuit for HVP.
HVP Programming
NSDSP-2 can program PIC18F6723 with HVP.
With NSDSP-1, HVP programming is possible, but only with NSHVX High Voltage Extension or an external HVP circuit.
Programming Benchmarks
We have measured time necessary to program and verify PIC18F6723.
Operation | Time | Programming and Verification | 7.7s | Programming only | 6.0s | Verification only | 2.6s |
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The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas and very slow data EEPROM.
Debugging
NSDSP firmware contains all the necessary provisions for debugging PIC18F6723 and may be debugged when debugging software becomes available.
PIC18F6723 uses ordered halting, has 3 hardware breakpoints.
Debugger requires 768 bytes of ROM and 16 bytes of RAM.
Links
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