dsPIC33FJ64MC506A
dsPIC33FJ64MC508 dsPIC33FJ64MC508A dsPIC33FJ64MC510 dsPIC33FJ64MC510A dsPIC33FJ64MC706 dsPIC33FJ64MC706A dsPIC33FJ64MC710 dsPIC33FJ64MC710A dsPIC33FJ64MC802 dsPIC33FJ64MC804dsPIC33FJ64MC506A
Support summary
ICSP Connection
dsPIC33FJ64MC506A has more than one pair of PGECx and PGEDx pins. You can use any pair, but you must use them as a pair. For example, if PGEC2 is used for ICSPCLK, then ICSPDAT must be connected to PGED2.
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
Debugging
NSDSP firmware contains all the necessary provisions for debugging dsPIC33FJ64MC506A and may be debugged when debugging software becomes available.
dsPIC33FJ64MC506A uses ordered halting, has 4 hardware breakpoints.
Debugging does not consume resources in the user space.
Links
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