dsPIC33FJ64GP206

Support summary

• Programming - Yes
• Debugging provisions - Yes

ICSP Connection

This PIC device is equipped with extremely low endurance flash. The datasheet specification guarantees only 100 erase/write cycles. It is easy to wear the flash out during development.

dsPIC33FJ64GP206 has more than one pair of PGECx and PGEDx pins. You can use any pair, but you must use them as a pair. For example, if PGEC2 is used for ICSPCLK, then ICSPDAT must be connected to PGED2.

All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.

SDO1 pin will toggle at high frequency during programming. Make sure this does not harm your circuit.

Debugging

NSDSP firmware contains all the necessary provisions for debugging dsPIC33FJ64GP206 and may be debugged when debugging software becomes available.

dsPIC33FJ64GP206 uses ordered halting, has 6 hardware breakpoints.

Debugging does not consume resources in the user space.

Links

Microchip dsPIC33FJ64GP206 page