dsPIC30F6012dsPIC30F6012A dsPIC30F6013 dsPIC30F6013A dsPIC30F6014 dsPIC30F6014A dsPIC30F6015
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
dsPIC30F6012 is more sensitive to cross-talk between PGEC and PGED lines than other PIC devices. This may lead to programming failures, such as inability to connect or various verification failures. One of the methods to improve connectivity is to connect a small 20pF capacitor between PGEC line and VSS as close to the chip as possible. A bigger capacitor may be used, however you will have to decrease ICSP communication speed.
dsPIC30F6012 can only be programmed with HVP (High Voltage Programming). This means it requires Vpp voltage (higher than Vdd) for programming.
NSDSP-2 generates Vpp internally and can program dsPIC30F6012.
SDO1 pin will toggle at high frequency during programming. Make sure this does not harm your circuit.
Target Voltage below 4.5V
If voltage is less than 4.5V it is impossible to bulk erase the device. Unless the PIC device is code protected, NSDSP still can program the device, however, without the bulk erase it takes longer.
NSDSP cannot detect target voltage and it assumes that the voltage is above 4.5V. This ensures fast programming at usual voltages. However, if you want to program at voltages below 4.5V, you must specify the actual target voltage through programming software, or the programming will fail. If you specify the voltage below 4.5V NSDSP will apply special programming algorithm, which does not use bulk erase, but is slower than the regular algorithm.
If you are programming a device which is code protected, NSDSP cannot remove protection if the voltage is below 4.5V.
Bulk erase on dsPIC30F6012 always erase EEPROM. Therefore, when the programming software is configured to preserve EEPROM, NSDSP also uses slow row-by-row erase.
Contrary to Microchip documentation, our testing revealed that dsPIC30F6012 can perform bulk erase at any voltage from 2.5 to 5.5V, but only if the chip is uprotected. Therefore it is not necessary to use slow erase mechanisms just because the voltage is below 4.5V. However, if the chip is protected, the bulk erase can only be done above 4.5V.
The slow erase algorithm which uses row-by-row memory erase is very ureliable on dsPIC30F6012. If power is not stable or bypassing capacitors are missing, the process is very likely to fail. Therefore, we recommend to avoid programming uprotected chips or preserving EEPROM during programming. Newer dsPIC30F6012A chips do not have this problem and may be used as a replacement.
We have measured time necessary to program and verify dsPIC30F6012.
|Operation||> 4.5V||< 4.5V||Programming and Verification||11.0s||17.8s||Programming only||7.6s||14.3s||Verification only||2.8s||2.8s|
The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas and very slow data EEPROM.
NSDSP cannot be used to debug dsPIC30F6012.
© 2007-2021 Northern Software Inc. All Rights Reserved.