dsPIC30F1010dsPIC30F2010 dsPIC30F2011 dsPIC30F2012 dsPIC30F2020 dsPIC30F2023 dsPIC30F3010 dsPIC30F3011 dsPIC30F3012 dsPIC30F3013 dsPIC30F3014 dsPIC30F4011 dsPIC30F4012 dsPIC30F4013 dsPIC30F5011 dsPIC30F5013 dsPIC30F5015 dsPIC30F5016 dsPIC30F6010 dsPIC30F6010A dsPIC30F6011 dsPIC30F6011A dsPIC30F6012 dsPIC30F6012A dsPIC30F6013 dsPIC30F6013A dsPIC30F6014 dsPIC30F6014A dsPIC30F6015
dsPIC30F1010 has more than one pair of PGCx and PGDx pins. You can use any pair, but you must use them as a pair. For example, if PGC2 is used for ICSPCLK, then ICSPDAT must be connected to PGD2.
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
We have measured time necessary to program and verify dsPIC30F1010.
|Operation||Time||Programming and Verification||0.5s||Programming only||0.3s||Verification only||0.2s|
The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas.
NSDSP cannot be used to debug dsPIC30F1010.
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