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Northern Software Supported Devices PIC24HJ PIC24HJ128GP202 PIC24HJ128GP204 PIC24HJ128GP206 PIC24HJ128GP206A PIC24HJ128GP210 PIC24HJ128GP210A PIC24HJ128GP306 PIC24HJ128GP306A PIC24HJ128GP310 PIC24HJ128GP310A PIC24HJ128GP502 PIC24HJ128GP504 PIC24HJ128GP506 PIC24HJ128GP506A PIC24HJ128GP510 PIC24HJ128GP510A PIC24HJ12GP201 PIC24HJ12GP202 PIC24HJ16GP304 PIC24HJ256GP206 PIC24HJ256GP206A PIC24HJ256GP210 PIC24HJ256GP210A PIC24HJ256GP610 PIC24HJ256GP610A PIC24HJ32GP202 PIC24HJ32GP204 PIC24HJ32GP302 PIC24HJ32GP304 PIC24HJ64GP202 PIC24HJ64GP204 PIC24HJ64GP206 PIC24HJ64GP206A PIC24HJ64GP210 PIC24HJ64GP210A

PIC24HJ64GP502

PIC24HJ64GP504 PIC24HJ64GP506 PIC24HJ64GP506A PIC24HJ64GP510 PIC24HJ64GP510A

PIC24HJ64GP502

ICSP connection

Support summary

  • Programming - Yes
  • Debugging provisions - Yes

ICSP Connection

PIC24HJ64GP502 has more than one pair of PGECx and PGEDx pins. You can use any pair, but you must use them as a pair. For example, if PGEC2 is used for ICSPCLK, then ICSPDAT must be connected to PGED2.

All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.

Programming Benchmarks

We have measured time necessary to program and verify PIC24HJ64GP502.

Operation FCKSM=0xFCKSM=1x
Programming and Verification 2.1s2.3s
Programming only 1.9s2.0s
Verification only 1.2s1.2s

The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas.

Debugging

NSDSP firmware contains all the necessary provisions for debugging PIC24HJ64GP502 and may be debugged when debugging software becomes available.

PIC24HJ64GP502 uses ordered halting, has 2 hardware breakpoints.

Debugging does not consume resources in the user space.

Links

Microchip PIC24HJ64GP502 page

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