dsPIC33EV128GM102dsPIC33EV128GM103 dsPIC33EV128GM104 dsPIC33EV128GM106 dsPIC33EV256GM002 dsPIC33EV256GM003 dsPIC33EV256GM004 dsPIC33EV256GM006 dsPIC33EV256GM102 dsPIC33EV256GM103 dsPIC33EV256GM104 dsPIC33EV256GM106 dsPIC33EV32GM002 dsPIC33EV32GM003 dsPIC33EV32GM004 dsPIC33EV32GM006 dsPIC33EV32GM102 dsPIC33EV32GM103 dsPIC33EV32GM104 dsPIC33EV32GM106 dsPIC33EV64GM002 dsPIC33EV64GM003 dsPIC33EV64GM004 dsPIC33EV64GM006 dsPIC33EV64GM102 dsPIC33EV64GM103 dsPIC33EV64GM104 dsPIC33EV64GM106
dsPIC33EV128GM102 has more than one pair of PGECx and PGEDx pins. You can use any pair, but you must use them as a pair. For example, if PGEC2 is used for ICSPCLK, then ICSPDAT must be connected to PGED2.
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
We have measured time necessary to program and verify dsPIC33EV128GM102.
|Operation||FCKSM=0x||FCKSM=1x||Programming and Verification||2.9s||4.1s||Programming only||2.7s||2.7s||Verification only||2.2s||2.2s|
The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas.
NSDSP firmware contains all the necessary provisions for debugging dsPIC33EV128GM102 and may be debugged when debugging software becomes available.
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