dsPIC33CK64MC105
dsPIC33CK64MP102 dsPIC33CK64MP103 dsPIC33CK64MP105 dsPIC33CK64MP202 dsPIC33CK64MP203 dsPIC33CK64MP205 dsPIC33CK64MP206 dsPIC33CK64MP208 dsPIC33CK64MP502 dsPIC33CK64MP503 dsPIC33CK64MP505 dsPIC33CK64MP506 dsPIC33CK64MP508dsPIC33CK64MC105
Support summary
ICSP Connection
dsPIC33CK64MC105 has more than one pair of PGECx and PGEDx pins. You can use any pair, but you must use them as a pair. For example, if PGEC2 is used for ICSPCLK, then ICSPDAT must be connected to PGED2.
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
ICSP write inhibition
It is possible to configure dsPIC33CK64MC105 to inhibit all future ICSP writes. Once this is done, the PIC can never be re-programmed again. It is possible to read the chip with nsread if it is not read-protected.
To inhibit all future ICSP writes, use the following command:
nsprog inhibit-ICSP-write-irreversibly -d dsPIC33CK64MC105
This action is irreversible. Once you inhibit the ICSP writes, dsPIC33CK64MC105 cannot be re-programmed.
Debugging
NSDSP firmware contains all the necessary provisions for debugging dsPIC33CK64MC105 and may be debugged when debugging software becomes available.
dsPIC33CK64MC105 uses unordered halting, has 8 hardware breakpoints.
Debugging does not consume resources in the user space.
Links
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