dsPIC33CDVC256MP506

Support summary

• Programming - Yes
• Debugging provisions - Yes

ICSP Connection

dsPIC33CDVC256MP506 has more than one pair of PGECx and PGEDx pins. You can use any pair, but you must use them as a pair. For example, if PGEC2 is used for ICSPCLK, then ICSPDAT must be connected to PGED2.

All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.

ICSP write inhibition

It is possible to configure dsPIC33CDVC256MP506 to inhibit all future ICSP writes. Once this is done, the PIC can never be re-programmed again. It is possible to read the chip with nsread if it is not read-protected.

To inhibit all future ICSP writes, use the following command:

nsprog inhibit-ICSP-write-irreversibly -d dsPIC33CDVC256MP506

This action is irreversible. Once you inhibit the ICSP writes, dsPIC33CDVC256MP506 cannot be re-programmed.

Programming Benchmarks for NSDSP-1 and NSDSP-2

We have measured time necessary to program and verify dsPIC33CDVC256MP506 with NSDSP-1 or NSDSP-2 (both yeild the same speed).

Operation	FCKSM=0x	FCKSM=1x
Programming and Verification	5.7s	8.0s
Programming only	5.3s	5.3s
Verification only	4.5s	4.5s

The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas.

Debugging

NSDSP firmware contains all the necessary provisions for debugging dsPIC33CDVC256MP506 and may be debugged when debugging software becomes available.

dsPIC33CDVC256MP506 uses unordered halting, has 8 hardware breakpoints.

Debugging does not consume resources in the user space.

Links

Microchip dsPIC33CDVC256MP506 page