ConfigurationSpeed ICSP Cable Software for NSDSP Source Code Supported Devices
The NSDSP configuration is stored in non-volatile memory inside NSDSP.
The following parameters may be configured in NSDSP:
|PGC state||Next mode change||State of PGC pin depending on NSDSP mode. May be set to high, low, or high impedance. Configured separately for Unconnected, Idle, Suspended, or UART modes. Irrelevant in Programming or Debug modes. Helps detecting USB state.|
|PGD state||Next mode change||State of PGD pin depending on NSDSP mode. May be set to high, low, or high impedance. Configured separately for Unconnected, Idle, Suspended, or UART modes. Irrelevant in Programming or Debug modes. Helps detecting USB state.|
|PGM/RTS/MCLR||Next mode change||When this pin is used as PGM/RTS it must be configured to be kept low when not in use. However, if this pin is used as AMCLR in dual-chip setup it must be configured to be kept high.|
|USB Power||Next enumeration||Amount of power requested from USB bus (in mA). If set to zero, NSDSP will report itself as a self-powered device.|
|Voltage||Next mode change||Target voltage. If set, specifies the voltage of the
target PIC device. Must be set only if voltage is always at the same
level, for example NSDSP-1-5V can only work
with targets at 5V. If voltage can vary, as is the case with
NSDSP-1-U, the Voltage parameter must be set to 0.
The voltage may also be specified by the programming
software, which overrides this setting.|
NSDSP use the voltage setting to determine if bulk erase can be performed or not. If the voltage is below the bulk erase threshold specified by Microchip, NSDSP will use special algorithms which avoid bulk erase. If voltage is not specified, NSDSP assumes that the voltage is high enough to perform bulk erase operations. If actual target voltage is below the bulk erase threshold, such assumption will cause programming to fail.
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