PIC18F87J72PIC18F87J90 PIC18F87J93 PIC18F87J94 PIC18F87K22 PIC18F87K90 PIC18F95J94 PIC18F96J60 PIC18F96J65 PIC18F96J94 PIC18F96J99 PIC18F97J60 PIC18F97J94
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
Refer to the datasheet for alternative connections of ENVREG pin.
We have measured time necessary to program and verify PIC18F87J72.
|Operation||Time||Programming and Verification||4.8s||Programming only||3.5s||Verification only||2.2s|
The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas.
NSDSP firmware contains all the necessary provisions for debugging PIC18F87J72 with NSDS. Once NSDS support for this device is compliete, NSDS will be able to debug it.
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