dsPIC33FJ64MC802 has more than one pair of PGECx and PGEDx pins. You can use any pair, but you must use them as a pair. For example, if PGEC2 is used for ICSPCLK, then ICSPDAT must be connected to PGED2.
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
We have measured time necessary to program and verify dsPIC33FJ64MC802.
|Operation||FCKSM=0x||FCKSM=1x||Programming and Verification||2.0s||2.3s||Programming only||1.9s||2.0s||Verification only||1.2s||1.2s|
The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas.
NSDSP firmware contains all the necessary provisions for debugging dsPIC33FJ64MC802 with NSDS. Once NSDS support for this device is compliete, NSDS will be able to debug it.
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