dsPIC33FJ32MC202dsPIC33FJ32MC204 dsPIC33FJ32MC302 dsPIC33FJ32MC304 dsPIC33FJ64GP202 dsPIC33FJ64GP204 dsPIC33FJ64GP206 dsPIC33FJ64GP206A dsPIC33FJ64GP306 dsPIC33FJ64GP306A dsPIC33FJ64GP310 dsPIC33FJ64GP310A dsPIC33FJ64GP706 dsPIC33FJ64GP706A dsPIC33FJ64GP708 dsPIC33FJ64GP708A dsPIC33FJ64GP710 dsPIC33FJ64GP710A dsPIC33FJ64GP802 dsPIC33FJ64GP804 dsPIC33FJ64GS406 dsPIC33FJ64GS606 dsPIC33FJ64GS608 dsPIC33FJ64GS610 dsPIC33FJ64MC202 dsPIC33FJ64MC204 dsPIC33FJ64MC506 dsPIC33FJ64MC506A dsPIC33FJ64MC508 dsPIC33FJ64MC508A dsPIC33FJ64MC510 dsPIC33FJ64MC510A dsPIC33FJ64MC706 dsPIC33FJ64MC706A dsPIC33FJ64MC710 dsPIC33FJ64MC710A dsPIC33FJ64MC802 dsPIC33FJ64MC804
dsPIC33FJ32MC202 has more than one pair of PGECx and PGEDx pins. You can use any pair, but you must use them as a pair. For example, if PGEC2 is used for ICSPCLK, then ICSPDAT must be connected to PGED2.
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
PGEC3/PGED3 pair does not work on this device.
We have measured time necessary to program and verify dsPIC33FJ32MC202.
|Operation||FCKSM=0x||FCKSM=1x||Programming and Verification||1.4s||2.0s||Programming only||1.3s||1.4s||Verification only||0.7s||0.7s|
The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas.
NSDSP firmware contains all the necessary provisions for debugging dsPIC33FJ32MC202 with NSDS. Once NSDS support for this device is compliete, NSDS will be able to debug it.
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