dsPIC33EP64GS506dsPIC33EP64GS708 dsPIC33EP64GS804 dsPIC33EP64GS805 dsPIC33EP64GS806 dsPIC33EP64GS808 dsPIC33EP64MC202 dsPIC33EP64MC203 dsPIC33EP64MC204 dsPIC33EP64MC206 dsPIC33EP64MC502 dsPIC33EP64MC503 dsPIC33EP64MC504 dsPIC33EP64MC506
dsPIC33EP64GS506 has more than one pair of PGECx and PGEDx pins. You can use any pair, but you must use them as a pair. For example, if PGEC2 is used for ICSPCLK, then ICSPDAT must be connected to PGED2.
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
Dual partition architecture
dsPIC33EP64GS506 may be used as a regular unpartitioned chip, or it may be divided into two partitions, each of which can be used to boot the device. In the unpartitioned mode, the program memory is used as a single block (0x000000-0x00b000). However, in the dual-partition mode, it is divided into two equal parts - active partition (0x000000-0x005800) and inactive partition (0x400000-0x405800). Active and inactive partitions may be swapped - see datasheet for details.
Before programming, NSDSP searches the HEX file for the FBOOT configuration register. If it is absent or indicates unpartitioned mode, NSDSP does not partition the chip. If it is found and indicates dual-partition mode, NSDSP partitions the chip and expects that the data to program individual partitions will be in range 0x000000-0x005800 for the first partition or in range 0x400000-0x405800 for the second partition. NSDSP will not accept program memory addresses outside these two ranges. After programming, depending on the configuration bits, the partitions may get swapped.
When NSDSP is used to read memory it first determines if the chip is partitioned or not. If the chip is not partitioned, NSDSP reads the memory as a single block. If the chip is partitioned, the first partition is always reported as active (0x000000-0x005800) and the second partition is always reported as inactive (0x400000-0x405800) regardless of which partition was actually active at the time of reading.
Such arrangement guarantees consistency - if you read a HEX file from the device, then re-program it onto other device, both devices will have identical programming.
We have measured time necessary to program and verify dsPIC33EP64GS506.
|Operation||FCKSM=0x||FCKSM=1x||Programming and Verification||1.5s||2.0s||Programming only||1.5s||1.5s||Verification only||1.2s||1.2s|
The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas.
NSDSP firmware contains all the necessary provisions for debugging dsPIC33EP64GS506 with NSDS. Once NSDS support for this device is compliete, NSDS will be able to debug it.
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