dsPIC33EP128GS808dsPIC33EP128MC202 dsPIC33EP128MC204 dsPIC33EP128MC206 dsPIC33EP128MC502 dsPIC33EP128MC504 dsPIC33EP128MC506 dsPIC33EP16GS202 dsPIC33EP16GS502 dsPIC33EP16GS504 dsPIC33EP16GS505 dsPIC33EP16GS506 dsPIC33EP256GM304 dsPIC33EP256GM306 dsPIC33EP256GM310 dsPIC33EP256GM604 dsPIC33EP256GM706 dsPIC33EP256GM710 dsPIC33EP256GP502 dsPIC33EP256GP504 dsPIC33EP256GP506 dsPIC33EP256MC202 dsPIC33EP256MC204 dsPIC33EP256MC206 dsPIC33EP256MC502 dsPIC33EP256MC504 dsPIC33EP256MC506 dsPIC33EP256MU806 dsPIC33EP256MU810 dsPIC33EP256MU814 dsPIC33EP32GP502 dsPIC33EP32GP503 dsPIC33EP32GP504 dsPIC33EP32GS202 dsPIC33EP32GS502 dsPIC33EP32GS504 dsPIC33EP32GS505 dsPIC33EP32GS506 dsPIC33EP32MC202 dsPIC33EP32MC203 dsPIC33EP32MC204 dsPIC33EP32MC502 dsPIC33EP32MC503 dsPIC33EP32MC504 dsPIC33EP512GM304 dsPIC33EP512GM306 dsPIC33EP512GM310 dsPIC33EP512GM604 dsPIC33EP512GM706 dsPIC33EP512GM710 dsPIC33EP512GP502 dsPIC33EP512GP504 dsPIC33EP512GP506 dsPIC33EP512GP806 dsPIC33EP512MC202 dsPIC33EP512MC204 dsPIC33EP512MC206 dsPIC33EP512MC502 dsPIC33EP512MC504 dsPIC33EP512MC506 dsPIC33EP512MC806 dsPIC33EP512MU810 dsPIC33EP512MU814 dsPIC33EP64GP502 dsPIC33EP64GP503 dsPIC33EP64GP504 dsPIC33EP64GP506 dsPIC33EP64GS502 dsPIC33EP64GS504 dsPIC33EP64GS505 dsPIC33EP64GS506 dsPIC33EP64GS708 dsPIC33EP64GS804 dsPIC33EP64GS805 dsPIC33EP64GS806 dsPIC33EP64GS808 dsPIC33EP64MC202 dsPIC33EP64MC203 dsPIC33EP64MC204 dsPIC33EP64MC206 dsPIC33EP64MC502 dsPIC33EP64MC503 dsPIC33EP64MC504 dsPIC33EP64MC506
dsPIC33EP128GS808 has more than one pair of PGECx and PGEDx pins. You can use any pair, but you must use them as a pair. For example, if PGEC2 is used for ICSPCLK, then ICSPDAT must be connected to PGED2.
All VSS and VDD pins must be connected. Even if one of these pins is not connected, programming may fail.
Dual partition architecture
dsPIC33EP128GS808 may be used as a regular unpartitioned chip, or it may be divided into two partitions, each of which can be used to boot the device. In the unpartitioned mode, the program memory is used as a single block (0x000000-0x015800). However, in the dual-partition mode, it is divided into two equal parts - active partition (0x000000-0x00ac00) and inactive partition (0x400000-0x40ac00). Active and inactive partitions may be swapped - see datasheet for details.
Before programming, NSDSP searches the HEX file for the FBOOT configuration register. If it is absent or indicates unpartitioned mode, NSDSP does not partition the chip. If it is found and indicates dual-partition mode, NSDSP partitions the chip and expects that the data to program individual partitions will be in range 0x000000-0x00ac00 for the first partition or in range 0x400000-0x40ac00 for the second partition. NSDSP will not accept program memory addresses outside these two ranges. After programming, depending on the configuration bits, the partitions may get swapped.
When NSDSP is used to read memory it first determines if the chip is partitioned or not. If the chip is not partitioned, NSDSP reads the memory as a single block. If the chip is partitioned, the first partition is always reported as active (0x000000-0x00ac00) and the second partition is always reported as inactive (0x400000-0x40ac00) regardless of which partition was actually active at the time of reading.
Such arrangement guarantees consistency - if you read a HEX file from the device, then re-program it onto other device, both devices will have identical programming.
We have measured time necessary to program and verify dsPIC33EP128GS808.
|Operation||FCKSM=0x||FCKSM=1x||Programming and Verification||2.7s||3.7s||Programming only||2.7s||2.7s||Verification only||2.3s||2.3s|
The measurements reflect the time necessary to program/verify the entire chip, including all user programmable memory areas.
NSDSP firmware contains all the necessary provisions for debugging dsPIC33EP128GS808 and may be debugged when debugging software becomes available.
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